This invention relates to high electron mobility transistor (HEMT) devices, and more particularly to HEMT devices having split-channels.
As is known in the art, one type of semiconductor device is a High Electron Mobility Transistor (HEMT). One type of HEMT is a metamorphic HEMT (MHEMT) such as that shown in the cross-section in FIG. 1. The device is constructed by growing crystal compounds containing In, Ga, Al, and As on GaAs wafers. In these devices, electrons are conducted into and out of the device""s semiconductor layers by means of ohmic metal contacts. Upon entering the semiconductor layers below the source ohmic metal, electrons are routed to a channel layer consisting of InGaAs. Once in the channel layer, electrons are confined there by virtue of an InAlAs Schottky layer and an InAlAs barrier layer until they again reach the drain ohmic contact. Electrons have an affinity for the channel layer because the electronic properties of the InGaAs and InAlAs are such that electrons are at a lower potential energy when they reside in the lnGaAs channel layer. InGaAs cap layers combined with a high-temperature bake, i.e. alloy of the ohmic metal, serve to aid the formation of low-resistance ohmic contacts which aid the entry and exit of electrons to and from the channel layer.
Devices similar to the MHEMT in form and function can also be constructed on InP substrates. The resulting InP HEMTs have similar electrical properties to MHEMTs but are more restricted in terms of material composition design.
As is also known in the art, MHEMTs and similar devices are typically used to amplify electrical signals at frequencies up to approximately 150 GHz. Present challenges include obtaining high efficiency, power, and gain above 60 GHz along with low cost, and design flexibility that allows trade-offs to be made between power density and gain. In order to reduce cost, these devices utilize metamorphic growth technology described in a paper entitled xe2x80x9cMolecular beam epitaxial growth and device performance of metamorphic high electron mobility transistor structures fabricated on GaAs substrates"" by W. E. Hoke, P. J. Lemonias, J. J. Mosca, P. S. Lyman, A. Torabi, P. F. Marsh, R. A. McTaggart, S. M. Lardizabal, and K. Hetzler, published in the Journal of Vacuum Science and Technology B 17, 1131 (1999). This process allows the fabrication of high indium content channel layers as needed to obtain acceptably high gain above 60 GHz.
Normally, InP substrates must be used to grow devices having channel layers with indium contents near 45-60% as required for acceptable frequency response at mm-wave frequencies. However, the metamorphic growth technology allows the growth of such high indium devices on GaAs substrates, thus reducing wafer breakage and improving manufacturability. Additionally, metamorphic technology allows one to vary the channel indium content upward, for low-power applications, to obtain low noise and high gain at high frequencies or downward to obtain higher power output while sacrificing noise figure as would be done for power amplifier applications.
Power-added efficiency (PAE), is defined as:   PAE  =                              P          RFout                -                  P          RFin                            P        DC              =                  P        RFout            ⁢                        (                      1            -                          1              G                                )                          P          DC                    
where PDC is the DC power drawn by the amplifier, PRFout and PRFin are the amplifier RF output and RF input signal powers respectively, and   G  =            P      RFout              P      RFin      
is the amplifier power gain. Alternatively, PAE can be defined as:   PAE  =            δ      ⁡              (                  G          -          1                )              G  
where the drain efficiency xcex4 is defined as:   δ  =                    P        RFout                    P        DC              .  
In order to maximize PAE, it is important to maintain a high gain, well over unity. PAE is typically quoted as a percentage obtained by multiplying the above PAE by 100.
FIG. 2 shows an RF load line (11) overlaying the MHEMT""s family of IV curves and the RF power output can be found from:       P    RFout    =                              (                                    V              max                        -                          V              min                                )                ⁢                  (                                    I              peak                        -                          I              min                                )                    8        .  
The RF voltage swing, Vmaxxe2x88x92Vmin and current swing, Ipeakxe2x88x92Imin are limited by the MHEMT""s family of curves. Limitations on any of the four Vmax, Imin, Vmin, and/or Ipeak will limit RF power output. Vmin and Ipeak are constrained to Vmin greater than 0 and Ipeak less than Idpeak as shown in FIG. 2, by the device""s on resistance, Ron. In MHEMTs, Vmax is usually limited by the requirement to set the drain RF load and/or the DC drain bias voltage so that Vds always remains below that which induces a fast, destructive burnout process. It appears that this burnout mechanism is related to the rate of impact ionization in the channel which is proportional to Ids as well as Vds. Therefore the value of Vds resulting in burnout, i.e. Vburn, generally falls as Ids increases. Additionally, depending on the device, Imin can sometimes be nonzero due to the inability to pinch off the MHEMT drain current, Ids at a high drain voltage Vds. However, for devices containing high channel indium contents such as MHEMTs discussed here, the above burnout mechanism is usually the limiting factor of Vmax.
Technology limitations in ohmic contacts as well as trade-offs inherent in doping dictate a minimum practical value of Ron. A nonzero Ron limits the drain efficiency xcex4 because it reduces the RF current and voltage swing, and hence PRFout without a proportional reduction in PDC. Once the ohmic contacts are optimized, the only way left to further improve xcex4 is to increase the value of Vburn by reducing impact ionization. For a given Vds and device structure, impact ionization can be reduced by increasing the bandgap of the material by reducing the channel layer indium content.
Established PHEMT technologies use approximately 19% indium content in the channel and give approximately 2 dB gain at maximum PRFout at 95 GHz whereas a 53% indium channel MHEMT has shown 5 dB gain at 95 GHz at maximum PRFout Gain is a significant factor in PAE. For example, if the PHEMT and MHEMT had the same drain efficiency xcex4, then the MHEMT""s PAE would twice that of the PHEMT. For instance, at the low gains encountered in 95 GHz PHEMTs, PAE is 0.376 whereas the MHEMT""s PAE is 0.688. Furthermore, PHEMT amplifiers show typically 95 GHz PAEs in the range of 13% whereas InP and MHEMT PAEs are 20-24% at 95 GHz. Therefore, it is important to find a device structure that will allow a good compromise between low impact ionization and high gain at high frequencies.
As is also known in the art, conventional InP and metamorphic HEMTs (MHEMTs) use a single channel layer as shown in FIG. 1. Here, electrons flow in a homogenous sheet, i.e. the channel layer which has a uniform composition. While such devices obtain record low noise figures at high frequencies, the high indium content of their channel layers results in power limitations such as high gate current and low burnout voltage threshold (Vburn) due to the high levels of impact ionization at high values of drain voltage, Vds. The solution might appear to be one of simply lowering the indium content of the channel. However, reduced indium content will decrease electron mobility and electron velocity. The result will be reduced gain and efficiency at high frequencies.
As is also known in the art, compromises are possible whereby the indium content is decreased to 40-50% from the 60% channel indium content as used in MHEMTs designed for low noise and small signal applications. One technique used to provide a compromise involves splitting the channel layer into upper and lower channel layer as shown in FIG. 3. In most cases, the upper channel layer consists of InxGa1-xAs where 0.53 less than x less than 0.65 and the lower channel layer is InP. In some cases a portion of the InP channel is doped. Here, the high electron mobility characteristics of the upper channel enables excellent ohmic contacts and high electron velocity in the low electric field region, between gate and source, as shown in FIG. 3. Below the upper channel layer the lower InP channel layer is optimized for high electron velocity transport for high electric fields. In the low field region, the upper channel layer""s greater electron affinity confines most of the current in the upper channel layer. In the high field region between the gate and drain, the electrons attain high energies and velocity due to the high electric field. While the material of the upper channel layer allows electrons to obtain high velocity at low electric fields, at high electric fields, the high scattering rate of electrons will cause their velocity to level off or drop in the upper channel. This causes the current path to shift more into the InP in the high field region where the electrons can attain reduced scattering and greater velocity under the high E-field conditions of high field region. InP also offers the benefit of reduced impact ionization relative to InGaAs. The net result is with InP in the lower channel layer the device should obtain a higher net electron velocity giving it improved high-frequency gain. The reduced impact ionization of the lower channel layer will allow such a device to operate at higher Vds and allow higher RF output power than could be obtained with an all InxGa1-xAs with 0.53 less than x less than 0.60.
While making the lower channel from InP appears to be attractive, it presents the problem of growing phosphorus-containing materials which can be difficult in the molecular beam epitaxy (MBE) systems often used for device layer growth. Furthermore, growth of As-containing materials such as the InGaAs upper channel layer on an InP lower channel layer can be complicated because of material quality difficulties transitioning from InP to InGaAs growth. Growth on InP substrates introduces the need for enhanced care to prevent breakage, requires unique via processing relative to GaAs, and allows only a limited variation of indium content in the channel. InP in the device channel can require a redesign of the ohmic metals which had proven reliability and low resistance for all-InGaAs channel devices. Finally, the presence of InP, in the devices"" active layers requires special etchants, which complicates the isolation mesa etch process step because InP requires a different etchant than the rest of the As-based materials.
In accordance with the present invention, a transistor structure is provided having a semiconductor substrate; a barrier layer disposed over the substrate; a lower channel layer disposed on the barrier layer; an upper channel layer disposed on the lower channel layer, such lower channel being of the same material as the upper channel, the upper and lower channels having different mole fractions of an common element used in such upper and lower channel layers; and an Schottky layer on the upper channel layer.
In one embodiment, the lower channel layer has a bandgap greater that the bandgap of the upper channel layer.
In one embodiment, the lower channel layer has a bulk electron mobility lower than the bulk electron mobility of the upper channel layer.
In one embodiment, the substrate comprises GaAs and wherein the upper and lower channel layers comprise InGaAs.
In one embodiment, the upper and lower channel layers include indium.
In accordance with another feature of the invention, a transistor structure is provided. The structure includes a gallium arsenide (GaAs) semiconductor substrate; an indium aluminum gallium arsenide lattice match layer; an indium aluminum arsenide (InAlAs) barrier layer disposed over the lattice-match layer; an InyGa1-yAs lower channel layer disposed on the barrier layer, where y is the mole fraction of In content in the lower channel layer; an InxGa1-xAs upper channel layer disposed on the lower channel layer, where x is the mole fraction of indium content in the upper channel layer and where x is different from y; and an InAlAs Schottky layer on the InxGa1-xAs upper channel layer.
In one embodiment, the lower channel layer has a bandgap greater that the bandgap of the upper channel layer.
In one embodiment, the lower channel layer has an electron mobility lower than the electron mobility of the upper channel layer.
In one embodiment, x is in the range between 0.15 and 0.90 and y is in the range between 0.0 and 0.65.
In one embodiment, x is substantially 0.53 and y is substantially 0.43
Such transistor structure has most of the benefits of the InP split-channel HEMT but uses a GaAs substrate and has a phosphorus-free layer structure. The structure enables the use of indium contents outside the normal range allowed on InP substrates and allows a greater range of indium content relative to devices grown on InP substrates. The split channel (i.e., upper and lower channel layers of the present invention) allows independent optimization of the upper channel layer for excellent electron transport at the low electric field conditions found in the low electric field region between gate and source while performing an independent optimization on the lower channel layer material to obtain optimum electron transport while minimizing impact ionization in regions having a high electric field such as between the gate and drain.
Thus, the device achieves an excellent compromise between these two opposing parameters (i.e., low impact ionization and high gain at high frequencies) while enjoying the low cost and manufacturability afforded by the use of GaAs substrates.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.